2026-09-23T21:38:50Zhttps://api.repository.cam.ac.uk/server/oai/requestoai:www.repository.cam.ac.uk:1810/346112024-06-26T13:42:19Zcom_1810_34587com_1810_34586com_1810_256064col_1810_34589col_1810_205358
The development of magnetic tunnel junction fabrication techniques
10.17863/CAM.14192
Elwell, Clifford Alastair
The discovery of large, room temperature magnetoresistance (MR) in magnetic tunnel
junctions in 1995 sparked great interest in these devices. Their potential applications
include hard disk read head sensors and magnetic random access memory (MRAM).
However, the fabrication of repeatable, high quality magnetic tunnel junctions is still
problematic. This thesis investigates methods to improve and quantify the quality of
tunnel junction fabrication.
Superconductor-insulator-superconductor (SIS) and superconductor-insulatorferromagnet
(SIF) tunnel junctions were used to develop the fabrication route, due to the
ease of identifying their faults. The effect on SIF device quality of interchanging the top
and bottom electrodes was monitored. The relationship between the superconducting and
normal state characteristics of SIS junctions was investigated. Criteria were formulated
to identify devices in which tunneling is not the principal conduction mechanism in
normal metal-insulator-normal metal junctions.
Magnetic tunnel junctions (MTJs) were produced on the basis of the fabrication route
developed with SIS and SIF devices. MTJs in which tunneling is the principal
conduction mechanism do not necessarily demonstrate high MR, due to effects such as
magnetic coupling between the electrodes and spin scattering. Transmission electron
microscope images were used to study magnetic tunnel junction structure, revealing an
amorphous barrier and crystalline electrodes.
The decoration of pinholes and weak-links by copper electrodeposition was investigated.
A new technique is presented to identify the number of copper deposits present in a thin
insulating film. The effect of roughness, aluminium thickness and voltage on the number
of pinholes and weak-links per unit area was studied.
High frequency testing of read heads at wafer level was performed with a network
analyser. Design implications for read head geometry were investigated, independent of
magnetic performance. This technique has great potential to aid the rapid development of
read and write heads whilst improving understanding of the system.
University of Cambridge
2002-07
Thesis
Doctoral
Doctor of Philosophy (PhD)
en
EPSRC
Seagate Technology
http://www.dspace.cam.ac.uk/handle/1810/34611
https://www.repository.cam.ac.uk/handle/1810/34611
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Tunnel Junctions
Nanofabrication